Digital computers use input/output (I/O) buses for transferring information between peripheral devices and a computer central processing unit and computer memory. I/O functions are also required in systems with multiple distributed processors and multiple distributed memories.
There are a variety of widely used I/O bus architectures such as ISA (Industry Standard Architecture bus) and EISA (Extended Industry Standard Architecture bus). A relatively new bus architecture is the PCI local bus. The PCI Local Bus Specification for the PCI local bus is available from the PCI Special Interest Group, 5200 Elam Young Parkway, Hillsboro, Oreg.
In general, before a peripheral device communicates and transfers data over the PCI local bus, the device must be configured using PCI local bus configuration space commands. For example, the peripheral device may include command registers, timers, memory base, limit registers and other control circuits that may require configuration.
In some systems, it may be desirable that other functions be conducted in conjunction with some peripheral devices. However, in some situations, the PCI local bus may not be suitable for conducting some of the operations related to the additional functions. For example, field programmable gate array devices which include volatile programming memory can be connected to the PCI local bus. Such a device must be programmed each time it is powered up, but can not be programmed over the PCI local bus since the device must be programmed before interacting with the PCI local bus. Powered on devices might be connected or disconnected from the PCI local bus (Hot Swap) while other devices on the PCI local bus remain powered on. Hot swapping can corrupt logical states in PCI devices and corrupt data being transferred on the PCI local bus.
Hot swapping may also damage some devices connected to the PCI local bus such as devices using Complimentary Metal Oxide Semiconductor (CMOS) technology. CMOS devices are exposed to large currents when inputs to CMOS receivers are within the CMOS switching region. Some CMOS receivers have two field effect transistors (FETs) connected in series with a first FET connected to a positive power supply rail and a second FET connected to a negative power supply rail. When the input to the two FETS is in the switching region, both FETs can be continuously turned on at the same time creating a DC current path directly through the CMOS device. The continuous on state of the two FETs can dissipate enough power to damage the CMOS device.
CMOS devices also experience latch-up conditions when an input is driven beyond one of the CMOS power supply rails. In the latch-up condition, parasitic transistors in the CMOS structure dissipate large amounts of power that can destroy the CMOS device. Both power dissipation conditions described above can result from hot swapping on the PCI local bus.